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74AUP2G157DC ECAD models PCB Symbol, Footprint & ECAD Model

Low-power 2-input multiplexer

The 74AUP2G157 is a single 2-input multiplexer which select data from two data inputs (I0andI1) under control of a common data select input (S). The state of the common data select input determines the particular register from which the data comes. The output (Y, Y) presents the selected data in the true (non-inverted) and complement form. The enable input (E) is active LOW. When E is HIGH, the output Y is forced LOW and the output Y is forced HIGH regardless of all other input conditions.

Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74AUP2G157DC 74AUP2G157DC,125 935280734125 SOT765-1 Order product

Features

  • Wide supply voltage range from 0.8 V to 3.6 V
  • High noise immunity
  • Complies with JEDEC standards:
    • JESD8-12 (0.8 V to 1.3 V)
    • JESD8-11 (0.9 V to 1.65 V)
    • JESD8-7 (1.2 V to 1.95 V)
    • JESD8-5 (1.8 V to 2.7 V)
    • JESD8-B (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F Class 3A exceeds 5000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Target applications

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AUP2G157DCProduction1.1 - 3.6CMOS1.9 / -1.93.4ultra low-40~12520334.1113VSSOP8

Package

Type numberOrderable part number, (Ordering code (12NC))StatusMarkingPackageOutline versionReflow-/Wave solderingPacking
74AUP2G157DC74AUP2G157DC,125
( 9352 807 34125 )
Activea2P
VSSOP8
(SOT765-1)
SOT765-1Reel 7" Q3/T4, Reverse

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFEFRIFRMTBF (hour)MSLMSL leadfree
74AUP2G157DC74AUP2G157DC,12574AUP2G157DC0.03.293.04E811
Quality and reliability disclaimer

Documentation (7)

File nameTitleTypeDate
74AUP2G157Low-power 2-input multiplexerData sheet2019-03-15
AN10161PicoGate Logic footprintsApplication note2002-10-29
AN11052Pin FMEA for AUP familyApplication note2019-01-09
aup2g157aup2g157 IBIS modelIBIS model2013-04-07
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Leaflet2019-04-12
SOT765-1_125VSSOP8; Reel pack, reverse; SMD, 7" Q3/T4 Standard product orientation Orderable part number ending ,125 or H Ordering code (12NC) ending 125Packing2013-05-03
SOT765-1plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm bodyOutline drawing2018-11-14

Support

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Models

File nameTitleTypeDate
aup2g157aup2g157 IBIS modelIBIS model2013-04-07

Ordering, pricing & availability

Type numberOrderable part numberOrdering code (12NC)PackingBuy online
74AUP2G157DC74AUP2G157DC,125935280734125Reel 7" Q3/T4, ReverseOrder product

Sample

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